发明名称 CIRCUIT ELEMENT EVALUATING CIRCUIT PATTERN
摘要 PROBLEM TO BE SOLVED: To provide a circuit element evaluating circuit pattern which enable the easy and appropriate adjustment of the contacting state of the probes of an evaluating device with a circuit element to be evaluated for electric characteristic possible. SOLUTION: In a circuit element evaluating circuit pattern in which a circuit element (FET element) 1 to be evaluated for electric characteristic and a plurality of pads 2, 3, 4a, 4b, 5a, and 5b for signal and ground with which probes 11 installed to an evaluating device for conducting the circuit element 1, contact adjustment pads 8 and 9 which are elongated along the pads 2, 3,... and with which the probes 11 can be simultaneously brought into contact are provided. The probes 11 can be brought into contact with the pads 2, 3,... in ideal states by adjusting the contacting state of each probe 11, so that contacting state may become ideal by confirming the short-circuiting state of each probe 11.
申请公布号 JP2000232143(A) 申请公布日期 2000.08.22
申请号 JP19990033591 申请日期 1999.02.12
申请人 NEC CORP 发明人 KOSAKA YASUFUMI
分类号 H01L21/822;H01L21/66;H01L27/04;(IPC1-7):H01L21/66 主分类号 H01L21/822
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