发明名称 ERROR DETECTION CODING AND DECODING DEVICE AND ITS ENCODING AND DECODING METHOD
摘要 PROBLEM TO BE SOLVED: To increase the number of error detectable bits whose number of redundant bits is fixed and to suppress deterioration of quality when many error continuously take place in an unprotected bit. SOLUTION: A coupled circuit 4 inserts M unprotected bits in every N protected bits. When a burst error in which (M+1) or more bits are continuously mistaken is entered, a protected bit makes an error without fail. Then, even when an error is entered in an unprotected bit, the error can be detected. Thus, a bit being an object for error detection is increased in an apparent way. Meanwhile, when N protected bits are inserted in every M unprotected bits and when a burst error continuing (M+1) or more bits is entered, a protected bit makes an error without fail. Then, when the burst error continuing (M+1) or more bits is entered in an unprotected bit, the error can be detected. Thus, deterioration of quality occurring in a decoding series can be reduced by such a manner that many errors are continuously entered in the unprotected bit.
申请公布号 JP2000232374(A) 申请公布日期 2000.08.22
申请号 JP19990032122 申请日期 1999.02.10
申请人 NEC CORP 发明人 ITO HIRONORI;SERIZAWA MASAHIRO
分类号 G10L19/00;H03M13/00;H03M13/09;H03M13/27;H04B14/04;H04L1/00;(IPC1-7):H03M13/00 主分类号 G10L19/00
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