| 摘要 |
<p>PROBLEM TO BE SOLVED: To obtain a clock pulse generator having a very high maximum operation frequency by providing a transmission gate which passes a clock pulse from a clock input to an output of the transmission gate in accordance with a control signal from the preceding stage and a control signal generation circuit supplying a control signal to the next stage. SOLUTION: An input D is connected to the gates of transistors M1 and M2, and these two transistors form an inverter serially connected between supply lines vdd and gnd. Transistors M3 and M4 have those source-drain paths connected antiparallelly and form a transmission gate. The gate of the transistor M4 receives a control signal (a), and the gate of the transistor M3 receives an output signal (b) from the inverter. An output of the transmission gate supplies a signal (c) to a control signal generation circuit provided with transistors M5, M6, D7 and M8.</p> |
