Apparatus and method for branch target address calculation during instruction decode

摘要

An apparatus and method for improving the execution of conditional branch instructions is provided. A translator detects a conditional branch instruction during decode of the instruction, and provides a displacement to a target address calculator. The target address calculator calculates a target address for the branch instruction during decoding of the branch instruction by summing the displacement with a next instruction linear address. A signal is provided to indicate whether the target address is within a current code segment. The target address is provided to an instruction fetcher for use by the fetcher if it is predicted that the branch will be taken. Validation of the calculated target address is made by comparing the signal with the sign of the displacement.