| 摘要 |
PURPOSE: A layout method of a logic block is to increase a performance speed by reducing a junction capacitance, so as to obtain a high speedy and integrated semiconductor memory apparatus. CONSTITUTION: A layout method of a logic block consisting of a plurality of transistors, comprises the steps of: laying out the active regions of the transistors having some first and second electrodes formed on a semiconductor substrate; and laying out the gates of the transistor positioned between the first electrode and the second electrode, and having a length and width(w) defined on the semiconductor substrate, the gates of the transistors being commonly connected with one another on the semiconductor substrate, and the width defined on the substrate being divided by 2 or more.
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