发明名称 Biasing circuit for isolation region in integrated power circuit
摘要 <p>An integrated circuit including a vertical power component having a terminal formed by a chip substrate (1) of a first conductivity type, a control circuitry thereof, the control circuitry isolated from the substrate (1) by means of an isolation region (3) of a second conductivity type, and a protection structure against polarity inversion of a substrate potential (SUB). The protection structure comprises a first bipolar transistor (Q33) with an emitter connected to said isolation region and a collector connected to a reference potential input (12) of the integrated circuit, a bias circuit (Q11,R11,R22,R33,R44) for biasing the first bipolar transistor (Q33) in a reverse saturated mode when the substrate potential is higher than the reference potential, and a second bipolar transistor (Q22) with an emitter connected to the substrate and a base coupled to the isolation region for coupling the isolation region to the substrate through a high-impedance when the substrate potential is lower than the reference potential. &lt;IMAGE&gt;</p>
申请公布号 EP1028468(A1) 申请公布日期 2000.08.16
申请号 EP19990830066 申请日期 1999.02.09
申请人 STMICROELECTRONICS S.R.L. 发明人 TORRES, ANTONINO;SPAMPINATO, SERGIO TOMMASO
分类号 H01L21/761;H01L27/082;(IPC1-7):H01L27/02;H03K17/081 主分类号 H01L21/761
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