发明名称 |
METHOD FOR FORMING BIT LINE TO SEMICONDUCTOR MEMORY DEVICE |
摘要 |
PURPOSE: A method is provided to prevent a short between a bit line and gate electrode by avoiding an over-etching of a bit line contact pad. CONSTITUTION: A method comprises steps: a) depositing a bit line contact pad(108a), a material layer(109), and an inter dielectric layer(110) in sequence on a substrate(100); b) forming a bit line opening(112a, 112b) on each of cell array and core/peripheral region by etching a part of an inter dielectric layer selectively; c) forming a bit line spacer(114a,114b) on both walls of bit line openings, in which a bit line contact pad(108a) is exposed by etching a material layer; d) forming a bit line contact hole(116) by etching an inter dielectric layer; e) depositing a conductive layer(120) on overall substrate; and f) forming a bit line(120a) connected to a bit line contact pad on a cell array region as well as a b it line(120c) connected to a substrate on a core/peripheral region by etching a conductive layer.
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申请公布号 |
KR20000051680(A) |
申请公布日期 |
2000.08.16 |
申请号 |
KR19990002252 |
申请日期 |
1999.01.25 |
申请人 |
SAMSUNG ELECTRONICS CO., LTD. |
发明人 |
SHIN, SU HO;LEE, GYU HYEON |
分类号 |
H01L21/768;(IPC1-7):H01L21/768 |
主分类号 |
H01L21/768 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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