| 摘要 |
PURPOSE: A method for manufacturing fine wiring of a semiconductor device is provided to stably embody a line width of 1 micro meter or less which is a limit of an exposure apparatus, by forming a sidewall to use a chemical mechanical polishing(CMP) process. CONSTITUTION: A method for manufacturing fine wiring of a semiconductor device comprises the steps of: forming a stacked structure of a gate insulation layer, a gate wiring layer and a first silicon oxidation layer on a semiconductor substrate, applying a photoresist layer on the first silicon oxidation layer, and forming a photoresist layer pattern by exposure and development processes through an exposure apparatus; selectively etching the first silicon oxidation layer by using the photoresist layer pattern; forming a nitride layer sidewall on a side surface of the first silicon oxidation layer by eliminating the photoresist layer pattern and selectively etching after evaporating a silicon nitride layer on the entire surface; performing a chemical mechanical polishing process until a round region on a second silicon oxidation and the nitride layer sidewall is eliminated after evaporating the second silicon oxidation layer on the entire surface of the structure; and etching the gate wiring layer and the gate insulation layer in the bottom by using the nitride layer sidewall after eliminating the first silicon oxidation layer.
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