发明名称 TRANSACTION PROCESS METHOD ON INTERCONNECTION BUS
摘要 PURPOSE: A transaction process method is provided to minimize an occurrence of meaningless bus transactions and prevent dead lock of meaningless bus transaction from occurring when performing a bus transaction process and a consistency maintenance process in a symmetric multiprocessor system where a plurality of processors and memories are interconnected on an interconnection bus. CONSTITUTION: A transaction process method comprises steps of storing a specific address when generating a transaction requesting to read a memory data of the specific address, detecting a specific address of a transaction generated from other processor, comparing the specific address at one processor with that at other processor, and selectively stopping the transaction generated from the other processor. If the compared specific addresses are not identical, the transaction generated from the other processor is neglected. Otherwise, the transaction from the other processor is stopped except for rewriting process.
申请公布号 KR20000051514(A) 申请公布日期 2000.08.16
申请号 KR19990002012 申请日期 1999.01.22
申请人 LG ELECTRONICS INC. 发明人 JUNG, BYUNG SUN
分类号 G06F9/46;(IPC1-7):G06F9/46 主分类号 G06F9/46
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