发明名称 PRODUCTION OF GRAIN BOUNDARY INSULATION-TYPE LAMINATED SEMICONDUCTOR CAPACITOR
摘要 PROBLEM TO BE SOLVED: To obtain the subject capacitor with reduced variance in electrical properties and high weatherability through a uniform sintering process. SOLUTION: This semiconductor capacitor 1 with reduced variance in electrical properties and high weatherability is obtained by the following process: an internal electrode layer 4 is made by using an electrode paste predominant in nickel and incorporated with a glass compound based on boric anhydride, lithium oxide and sodium oxide, and printed and laminated on a dielectric ceramic layer 2 followed by pressure contact bonding under heating to promote the uniform sintering of the dielectric ceramic layer 2.
申请公布号 JP2000226257(A) 申请公布日期 2000.08.15
申请号 JP19990029572 申请日期 1999.02.08
申请人 MATSUSHITA ELECTRIC IND CO LTD 发明人 OGOSE YOICHI
分类号 H01G4/12;C04B35/46 主分类号 H01G4/12
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