摘要 |
A ferroelectric liquid crystal display comprises an addressable matrix of pixels 7 and addressing circuitry comprising a data signal generator 14 for applying data signals to column electrode tracks 41, 42. . . . . 4n and a strobe signal generator 15 for applying strobe signals to row electrode tracks 51, 52. . . . . 5m in order to selectively switch the pixels 7. In order to provide a large number of well defined grey levels, the addressing circuitry includes spatial and/or temporal dither control circuits for addressing separately addressable subpixels of each pixel 7 with different combinations of spatial dither signals and/or for addressing at least part of each pixel with different combinations of temporal dither signals applied to separately addressable temporal bits corresponding to subframes of different periods to produce a plurality of different transmission levels. Furthermore at least a part of each pixel is switchable between different states by means of on and off switching signals, at least one bit of some of the pixels being switchable into intermediate states, including at least one error producing analogue state, by intermediate switching signals in order to produce intermediate overall transmission levels, and such switching being controlled so that periods in which at least part of the pixel is in an error producing analogue state alternate with periods in which the part is in a substantially error free state in order to limit the propagation of transmission errors.
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