| 摘要 |
PROBLEM TO BE SOLVED: To provide a processor where the data path size at the time of multiple parallel operation is not limited by the data path size at the time of single operation. SOLUTION: A processor 100 has, for example, the standard SISD data path of 64 bits at a maximum and the expanded SIMD data path of 128 bits and each data path is provided with first and second integer units. When two ordinary ALU operation instructions are simultaneously issued, plural instructions are executed in parallel by using the integer units. When an ordinary ALU operation instruction and an expanded ALU instruction are simultaneously issued and the expanded ALU operation instruction is a preceding instruction, the execution of the expanded ALU operation instruction is preferentially performed and until the end of that instruction execution, the execution of the ordinary ALU operation instruction is halted. When the expanded ALU operation instruction is issued, the instruction is executed after the first and second data paths are coupled and made into one expansion SIMD data path of 128 bits. |
