发明名称 SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE
摘要 <p>PROBLEM TO BE SOLVED: To shorten a time required for reading out data from a memory cell in which data of (n) levels (n is integer of 4 or more) is stored. SOLUTION: This device is provided with a memory cell array which stores four level data and comprises first and second memory cells, when four level data are discriminated, the four level data are divided into a first read-out and second read-out, the first read-out is performed by respective common 0V for a source potential Vs of the first and the second memory cells, the second read-out is performed by switching a source potential Vs of the first and the second memory cells to 0V or positive potential Vm in accordance with a result of the second read-out.</p>
申请公布号 JP2000228092(A) 申请公布日期 2000.08.15
申请号 JP19990029971 申请日期 1999.02.08
申请人 TOSHIBA CORP 发明人 ARAI FUMITAKA;SHIRATA RIICHIRO
分类号 G11C16/02;(IPC1-7):G11C16/02 主分类号 G11C16/02
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