发明名称 Low power undervoltage detector with power down mode
摘要 A single-ended power supply under-voltage level detection circuit included first and second stages of devices stacks coupled between a power supply signal and a reference potential. As the power supply increases it overcomes device threshold voltages in the first stage causing it to enable the second stage. As the power supply signal continues to increase and reaches a second voltage level, the second stage outputs a level indicator signal which indicates that the power supply is greater than or equal to a predetermined voltage level. A power-down signal can be externally applied to devices in the first and second stages so as to disable the detection circuit no matter what the power supply signal level is. In addition, the detection circuit can be used in a power-on-reset (POR) circuit to detect when the power supply has reached a predetermined voltage level so as to cause the POR circuit to output a POR signal an extended time interval afterwards.
申请公布号 US6104220(A) 申请公布日期 2000.08.15
申请号 US19980009567 申请日期 1998.01.20
申请人 VLSI TECHNOLOGY, INC. 发明人 CICCONE, JOHN C.
分类号 H03K17/22;(IPC1-7):H03L7/00 主分类号 H03K17/22
代理机构 代理人
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