发明名称 Circuit for the detection of changes of address
摘要 A memory is provided with an addressing circuit comprising an address bus to convey address signals, biasing and selector switch circuits connected to the address bus for the selecting and biasing of lines of the memory and write circuits for the writing of data in cells of the memory. The memory comprises an enabling circuit to enable an operation of writing in memory. This enabling circuit comprises a circuit to memorize a designated address or to write data elements, a comparison circuit to compare a current address available on the address bus with the designated address and a blocking circuit to prevent the writing when the comparison reveals a difference of address.
申请公布号 US6104644(A) 申请公布日期 2000.08.15
申请号 US19980013966 申请日期 1998.01.27
申请人 SGS-THOMSON MICROELECTRONICS S.A. 发明人 BRIGATI, ALESSANDRO
分类号 G11C7/02;G11C16/08;G11C16/10;G11C16/22;(IPC1-7):G11C7/00 主分类号 G11C7/02
代理机构 代理人
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