发明名称 DIGITAL MODULATION CIRCUIT
摘要 PROBLEM TO BE SOLVED: To provide a digital modulation circuit the circuit scale of which is reduced by half and which can make low-frequency suppression. SOLUTION: At recording of digital data on a recording medium, convolution is performed by means of a convolution circuit 1 by adding a prescribed initial value to each recorded data having a fixed length. The output of the circuit 1 is divided into two parts, and one part is used for obtaining convolution in which plural initial values are added to the recorded data via the correlation among the convolutions through a DSV code generating circuit 5. Then the convolutions are respectively passed through NRZI modulation circuits 6a-6p and DSVs are calculated by means of DSV calculating circuits 7a-7p at every prescribed unit. The maximum values of the DSVs are found by means of DSV comparators 8a-8p, and the smallest maximum DSV value is selected by means of a selector 10. In addition, its initial value is stored. The other part of the output is stored in a modulation memory 2, converted to made to correspond to the selected initial value, and outputted to a recording amplifier 15 through an NRZI modulation circuit 4.
申请公布号 JP2000224043(A) 申请公布日期 2000.08.11
申请号 JP19990025221 申请日期 1999.02.02
申请人 SHARP CORP 发明人 KAWAMURA TAKESHI
分类号 H04N5/92;G11B20/10;G11B20/14;H03M7/14;H03M13/23;(IPC1-7):H03M7/14 主分类号 H04N5/92
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