SEMICONDUCTOR INTEGRATION STRUCTURE

摘要

PROBLEM TO BE SOLVED: To suppress strain being introduced into a semiconductor element layer by setting the strain reducing layer of an integrated structure with a coefficient of thermal expansion within a specified range of a semiconductor element layer and a specified Young's modulus of a bother board or above and then bonding the upper and lower layers of an adhesion layer mechanically. SOLUTION: A semiconductor circuit board having an insulation film is employed as a mother board 54, a heat dissipation layer and a strain reducing layer 53 are deposited on the mother board 54 under room temperature, an adhesive layer 52 is laminated thereon while hardening through temperature rise and then a semiconductor element layer 51 is bonded thereto. The strain reducing layer 53 in such a structure is set with a coefficient of thermal expansion in the range of 0.6-1.5 times that of the semiconductor element layer 51 and a Young's modulus equal to or higher than 2.5 times that of the mother board 54. The adhesive layer 52 having high temperature hardening properties is provided with a function for bonding the upper and lower strain reducing layer 53 of the adhesive layer 52 and the semiconductor element layer 51 mechanically.