发明名称 CHIP SCALE PACKAGE FOR MULTICHIP
摘要 PROBLEM TO BE SOLVED: To reduce thickness and surface area by providing a film carrier with a plurality of conductive wires arranged on an insulation film. SOLUTION: Two chips 50, 52 of different size are contained in one package of substantially the same size as that of the larger one of the chips 50, 52 such that the chip 50 has a wider surface area than the chip 52. The chip 52 is placed on same surface as the insulation film 54 of a film carrier 58, a protrusion 66 of the chip 52 is surrounded by the insulation film 54 of the film carrier 58 and a plurality of conductive wires 56 are arranged on an insulation film. These conductive wires 56 are made thinner than a conductive wire being used in another type of carrier and the width thereof is also limited.
申请公布号 JP2000223654(A) 申请公布日期 2000.08.11
申请号 JP19990022262 申请日期 1999.01.29
申请人 UNITED MICROELECTRONICS CORP 发明人 SEN MEICHI;RIN SEITOKU
分类号 H01L25/18;H01L21/60;H01L25/065;H01L25/07;H01L27/10;(IPC1-7):H01L25/065 主分类号 H01L25/18
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