PROCESSOR, COMPILING DEVICE AND STORAGE MEDIUM RECORDING COMPILE PROGRAM

摘要

PROBLEM TO BE SOLVED: To provide a processor and a compiling device capable of reducing the number of executing cycles in the case of executing parallel processing in the processor executing plural instructions in one cycle. SOLUTION: Registers R0 to R31 are respectively divided into the area of high-order 32 bits and the area of low-order 32 bits. A register write control part 431 outputs information showing a register to write in and a writing position (high-order or low-order) in each instruction issued in one cycle to selectors 4321, 4322. The selectors 4321, 4322 respectively select one of respective data outputted from a first arithmetic part 44, a second arithmetic part 45 or a third arithmetic part 46 and respectively write selected data to the high-order and the low order of one register.