| 摘要 |
PROBLEM TO BE SOLVED: To provide a FIFO memory monitoring device capable of performing the fault- and phase-monitoring of a FIFO memory without increasing the scale of the FIFO memory. SOLUTION: The CRC data of main signal data written to the FIFO memory 10 are computed and the CRC computed result 20 and a data head indication bit 21 indicating the head of data are multiplexed in a multiplex part 19 and then written in synchronism with the head of the next frame data. On a read side, with a timing instructed from a write side and an intra-device FP 28 as references, stored multiplex data 31 are read from read data and demultiplexed in a demultiplex part 25. A demultiplexed stored CRC computed result 32 is compared with the CRC data computed from the read data and the fault of the FIFO memory is monitored. A demultiplexed stored data head indication bit 33 is compared with a head indication signal 40 generated in a read counter circuit 24 and the phase of a write counter circuit 15 and that of a read counter circuit 24 are monitored.
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