| 摘要 |
<p>PROBLEM TO BE SOLVED: To provide an ATM-PDS output interface circuit with high general-purpose performance and a simple configuration where a cell interval between information cells at an ATM layer side and a PDS layer side is equal to each other. SOLUTION: This ATM-PDS output interface circuit 8 is placed between an ATM layer side having an ATM switch and a PDS layer side. This interface circuit 8 has a speed adjustment FIFO 10, a write counter 11, a read counter 13, and an overflow discriminating section 12 and also a transmission line idle cell dummy cell conversion section 16.</p> |
