| 摘要 |
PROBLEM TO BE SOLVED: To facilitate the design of a gate array and a cell base IC by increasing the degree of freedom of the arrangement position of a macro cell. SOLUTION: A basic cell 10A is formed in a square shape as compared with a conventional, rectangular one. In each basic cell 10A, four sets where an NPN transistor 12 and a resistance element 11 are in a set are provided and are rotated at each 90 deg. for a center point 13 of the basic cell 10A for arranging the elements of each set. Each basic cell 10A is adjacent one another in an array without any clearance. The basic cell 10A is arrayed in a high-speed macro region 101 of a semiconductor chip for composing macro cells 105 and 106, and the high-speed macro region 101 and the input buffer of I/O regions 103 and 104 are connected by wiring 107, thus rotating the basic cell 10A of the macro cells 105 and 106 at each 90 deg. for the I/O regions 103 and 104 for arrangement.
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