发明名称 SEMICONDUCTOR MEMORY
摘要 PROBLEM TO BE SOLVED: To suitably set an output timing of an operation enabling signal for setting a column decoder to an operating state in response to a length of a /RAS(row address strobe) accessing time. SOLUTION: This semiconductor memory comprises a memory cell array 24, a row decoder 20 for decoding row address data to select a word line, a column decoder 22 for decoding column address data for designating a data line to select a data line, and a column decoder activating circuit 18 for outputting an operation enabling signal for enabling an operation of the column decoder to the column decoder. In this case, the column decoder activating circuit decides an output timing of the enabling signal in response to whether there is a sufficient allowance to sufficiently take a /RAS accessing time or not when the data is read.
申请公布号 JP2000222879(A) 申请公布日期 2000.08.11
申请号 JP19990023289 申请日期 1999.01.29
申请人 NEC CORP 发明人 KOSHIKAWA KOJI
分类号 G11C11/407;G11C8/10;G11C8/18;G11C11/401;(IPC1-7):G11C11/407 主分类号 G11C11/407
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