发明名称 PLL CIRCUIT AND METHOD FOR CONTROLLING THE CIRCUIT
摘要 PROBLEM TO BE SOLVED: To provide a PLL circuit, which can output oscillated signals having less spurious signals by moving a spurious generating frequency to the outside of the passing band of a loop filter. SOLUTION: When a frequency-dividing ratio K is changed at dividing of the frequency of the output signal of a VCO 11 by means of a variable frequency divider 22, the output signal of the divider 22 is changed. Namely the frequency of the input signal of a DDS 13 changes. When the frequency of the input signal of the DDS 13 changes, a spurious signal generating frequency also changes, because the frequency dividing ratio N/M of the DDS 13 changes.
申请公布号 JP2000224028(A) 申请公布日期 2000.08.11
申请号 JP19990023094 申请日期 1999.01.29
申请人 ANDO ELECTRIC CO LTD 发明人 FURUTA SANEYOSHI;MAEDA MINORU
分类号 H03L7/08;H04L7/033 主分类号 H03L7/08
代理机构 代理人
主权项
地址