FABRICATION OF TRANSISTOR

摘要

PROBLEM TO BE SOLVED: To provide a method for fabricating a transistor in which increase in the thickness of gate insulation layer or decrease in the thickness of gate polysilicon layer due to silicide process can be prevented. SOLUTION: An undoped polysilicon layer 411a is formed on a gate insulation layer 402 by silane flow process and a doped polysilicon layer 411b is formed thereon by admixing a silane flow wit a phosphine flow added with a dopant. Furthermore, a silicide layer 410 is formed thereon. Since the polysilicon layer has double layer structure of undoped and doped layers and an undoped polysilicon layer abuts on the insulation layer 402, oxidation is retarded.