发明名称 INFORMATION PROCESSOR, INSTRUCTION ASSIGNMENT CONTROLLING METHOD, ITS DEVICE AND COMPUTER-READABLE STORAGE MEDIUM RECORDING INSTRUCTION ASSIGNMENT CONTROLLING PROGRAM
摘要 PROBLEM TO BE SOLVED: To improve throughput and to reduce a program size in information processing to which a VLIW system is applied. SOLUTION: A priority order concerning the access of a PSW(program state word) is previously decided between plural arithmetic units in the case when the PSW in a PSW storing register 10 is simultaneously accessed at the time of parallel execution of instructions in the information processing of the VLIW system deciding which arithmetic unit executes each instruction at the time of generating a program when the plural arithmetic units (a memory unit 3 and an integer arithmetic unit 4) in the same processor 1 execute the plural instructions in parallel in the middle of programming. Thus, parallel execution while avoiding the access contention of the PSW becomes possible.
申请公布号 JP2000222208(A) 申请公布日期 2000.08.11
申请号 JP19990023151 申请日期 1999.01.29
申请人 MITSUBISHI ELECTRIC CORP 发明人 MINEMATSU ISAO;YAMADA AKIRA
分类号 G06F9/45;G06F9/00;G06F9/30;G06F9/32;G06F9/38;G06F15/16;G06F15/177;G06F15/80;(IPC1-7):G06F9/38 主分类号 G06F9/45
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