发明名称 MULTILAYER WIRING BOARD AND ITS MANUFACTURE
摘要 PROBLEM TO BE SOLVED: To reduce electric resistance between two via hole conductors sandwiching an internal wiring circuit layer, in a structure wherein via hole conductors formed by the filling of metal powder are connected with the upper and the lower surfaces of the internal wiring circuit layer. SOLUTION: In this multilayer wiring board, wiring circuit layers 12 composed of metal foils are formed on the surface and in the inside of an insulating board constituted by laminating a plurality of insulating layers 11a, 11b containing organic resin, and via hole conductors 13, 15 constituted by the filling of at least metal powder like copper are formed on and under the wiring circuit layer 12. Contact parts where the metal powder 14 in the via hole conductor 13 connected with the wiring circuit layer 12 is in contact with the wiring circuit layer 12 are welded. Metal powder 16 in the via hole conductors 15 connected with the wiring circuit layer 12 is connected with the wiring circuit layer 12 via solder 17.
申请公布号 JP2000223836(A) 申请公布日期 2000.08.11
申请号 JP19990020714 申请日期 1999.01.28
申请人 KYOCERA CORP 发明人 SASAMORI RIICHI
分类号 H05K1/11;H05K3/12;H05K3/40;H05K3/46;(IPC1-7):H05K3/46 主分类号 H05K1/11
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