发明名称 |
A PROCESSING CIRCUIT AND A SEARCH PROCESSOR CIRCUIT |
摘要 |
A processing circuit P1 for recognition and comparison of complex patterns in high-speed data streams can form a node in a network of circuits of this kind and comprises an interface for inputting of parameters for the circuit, at least one kernel processor P0 in the form of a comparator unit (COM) for comparing two data words, a logic unit (E) connected with the comparator unit and comprising a multiplexer (MUX1), a first D flip-flop (2), a latency unit (LAT) for delaying a positive binary value with a given number of time units, a second D flip-flop (4), a sequence control unit (SC) which monitors and controls a comparison operation in the comparator unit (COM), and a result selector (RS) which combines two result values from other processing circuits or other result selectors. A search processor circuit (PMC) for performing search and comparison operations on complex patterns comprises a multiprocessor unit Pn with processing circuits P1 in a tree structure and forms a binary or superbinary tree with n+1 levels S and degree k = 2<m>, m being a positive integer >/= 1. An underlying level Sn-q generally comprises 2<mq> circuits Pn-q provided nested in the 2<m(q-1)> circuits Pn-q+1 on the level Sn-q+1. A 0<th> level S0 defined for q = n in the unit Pn comprises 2<m(n-1)> to 2<mn> kernel processors P0 which form comparator units (COM) in the circuits P1. All circuits P1, P2...Pn have identical interfaces (I) and a logic unit (E) with a result selector (RS) for collecting the results of a search operation or a comparison operation. Use in search engines for search and retrieval of data stored in data bases.
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申请公布号 |
WO0029981(A3) |
申请公布日期 |
2000.08.10 |
申请号 |
WO1999NO00344 |
申请日期 |
1999.11.12 |
申请人 |
FAST SEARCH & TRANSFER ASA;SVINGEN, BOERGE;HALAAS, ARNE;BIRKELAND, OLAF, RENE |
发明人 |
SVINGEN, BOERGE;HALAAS, ARNE;BIRKELAND, OLAF, RENE |
分类号 |
G06F15/16;G06F15/173;G06F17/30;(IPC1-7):G06F17/30 |
主分类号 |
G06F15/16 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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