发明名称 |
Integrated memory |
摘要 |
The integrated memory has a data line pair, which is connected to a bit line pair via at least one differential amplifier. In addition, it has a control unit for setting first potential states on the data line pair which correspond to the differential signals of data to be written to the memory cells, and for setting at least one second potential state on the data line pair which does not correspond to any datum to be written to the memory cells. Furthermore, it has a detector unit having two inputs connected to the data line pair. The detector unit initiates a specific control function when the second potential state of the data line pair occurs.
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申请公布号 |
US6101141(A) |
申请公布日期 |
2000.08.08 |
申请号 |
US19990344922 |
申请日期 |
1999.06.28 |
申请人 |
SIEMENS AKTIENGESELLSCHAFT |
发明人 |
SCHOENIGER, SABINE;SCHROEGMEIER, PETER;HEIN, THOMAS;DIETRICH, STEFAN;MARX, THILO |
分类号 |
G11C11/409;G11C7/10;G11C11/4096;(IPC1-7):G11C7/02 |
主分类号 |
G11C11/409 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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