| 摘要 |
A chopper compare circuit of an A-D converter implemented through a semiconductor integrated circuit is provided with a series-connected body of a plurality of MOS capacitors to which the voltage of an analog signal and a reference voltage are alternately applied. A-D conversion errors resulting from change of the capacitances of the MOS capacitors depending on voltages between both electrodes thereof are reduced. A MOS capacitor is connected in parallel with or disconnected from a MOS capacitor, in response to a voltage across electrodes of a MOS capacitor.
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