发明名称
摘要 A mask process such as smoothing of a graphic or a character drawn into a bit pattern is performed by using only SHIFT, logical NOT, AND, OR operations of bit strings, rather than using conditional branch instructions in the form of "IF THEN ELSE" and "SWITCH" statements that lead to undesirable reduction of processing speed. This results in a substantial increase of the processing speed. Further, in order to process an image that is wider than a bus width or a register length at high speed, adjacent patterns of an original image, which are not necessarily used for a logical operation, are loaded onto left and right sides of a processing object, to form a processing unit for use in a logical operation.
申请公布号 JP3072721(B2) 申请公布日期 2000.08.07
申请号 JP19970233048 申请日期 1997.08.28
申请人 发明人
分类号 G06F12/04;G06T3/40;G06T5/00;H04N1/409;(IPC1-7):G06T3/40 主分类号 G06F12/04
代理机构 代理人
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