| 摘要 |
The present invention provides a fabrication process for fabricating a semiconductor integrated circuit device on a silicon substrate having an active device region isolated from the underlying substrate similar to a silicon on insulator(soi) substrate structure. The quasi-soi structure provides an inexpensive semiconductor integrated circuit device having a reduced floating body effect. The process for fabricating the substrate for use in fabricating the quasi-soi semiconductor device includes the steps of providing a silicon substrate member, fabricating at least one passivation layer consisting of silicon nitride over the silicon substrate member and protecting an underlying substrate surface region for subsequent fabrication of isolation trench regions, fabricating the isolation trench regions by etching portions of the passivation layer and portions of the substrate surface region forming an epitaxial silicon growing region. The process further includes the steps of fabricating the epitaxial silicon layer on the epitaxial silicon growing region and over the oxide isolation trenches, fabricating an MOS gate structure region including a silicon dioxide layer grown over the epitaxial silicon layer, and a polysilicon layer deposited over said silicon dioxide layer. The MOS gate structure is further surrounded by a spacer region under which is formed the devices channel region and salicidated source and drain regions for the quasi-soi semiconductor device. The source and drain regions are an implanted dopant material extending from the channel region to form an electrical path to a respective one of said isolation trench regions forming a capacitance junction.
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