Pre deposition stabilization method for forming a void free isotropically etched anisotropically patterned doped silicate glass layer

摘要

A chemical vapor deposition (CVD) method for forming a doped silicate glass dielectric layer within a microelectronics fabrication. There is first positioned within a reactor chamber a substrate employed within a microelectronics fabrication. There is then stabilized within the reactor chamber with respect to the substrate a first flow of a silicon source material absent a flow of a dopant source material. There is then deposited upon the substrate within the reactor chamber a doped silicate glass dielectric layer through a chemical vapor deposition (CVD) method. The doped silicate glass dielectric layer is formed employing a second flow of the silicon source material, a flow of an oxidant source material and the flow of the dopant source material. There may subsequently be formed through the doped silicate glass dielectric layer an anisotropically patterned via through an anisotropic patterning method. The anisotropically patterned via may then be isotropically etched to form an isotropically etched anisotropically patterned via without void formation within the sidewalls of the isotropically etched anisotropically patterned via.