发明名称 MULTILAYER WIRING BOARD AND MANUFACTURE THEREOF
摘要 PROBLEM TO BE SOLVED: To suppress Cu migration from occurring and progressing by designing and manufacturing so that a wiring pattern end at the high potential side locates outside a wiring pattern at the low potential side in a voltage applied state on a projection plane. SOLUTION: Signal patterns or power source pattern 102, 103 locate on an upper or lower layer to a ground pattern 101 such that when they are projected in an insulation film thickness direction, the conductor ends 10 of the signal patterns or power source patterns 102, 103 at the high potential side locate outside a ground pattern end 101 at the low potential side, resulting in that the high potential side wiring end faces in a voltage applied state locate outside the low potential side conductors to the low potential side wiring end faces on the upper or lower layer thereof. Thus the electric field concentration on the high potential side wiring ends can be avoided and the migration can be suppressed.
申请公布号 JP2000216551(A) 申请公布日期 2000.08.04
申请号 JP19990016540 申请日期 1999.01.26
申请人 HITACHI LTD 发明人 KASHIMURA TAKASHI;YAMAGUCHI YOSHIHIDE;WATABE MAKIO
分类号 H05K3/46;(IPC1-7):H05K3/46 主分类号 H05K3/46
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