NON-VOLATILE SEMICONDUCTOR MEMORY DEVICE

摘要

PROBLEM TO BE SOLVED: To improve the data read rate of a non-volatile semiconductor memory device using a floating gate electrode MOS transistor as a memory cell. SOLUTION: A memory cell array area is divided into a plurality of small memory cell areas, a main word line 9 and sub-word line 7 formed in the small memory cell array area are provided as the word lines, the sub-word line 7 is connected with the control gate electrode of a plurality of memory cells 1, a signal output to the main word line 9 from a decoder output inverter 5 is amplified with the sub-word line output inverter 8 and is then transferred on the sub-word line 7 and it is then supplied to the control gate electrode of the memory cell 1.