| 摘要 |
PROBLEM TO BE SOLVED: To provide the HIT/MISS-by-WAY counter which measures the use and operation efficiency of a cache memory composed of more than one WAY and its counting method. SOLUTION: As for the cache memory composed of more than one WAY, HIT-by-WAY counters 9a to 9d are provided by the WAYs so as to measure the use efficiency of the cache memory and have TAG address arrays 5a to 5d stored with TAG addresses of the cache memory and count how many times addresses registered in the entries of the TAG address arrays 5a to 5d are hit, and the each counter is equipped with a 1st counter which counts up each time an entry is hit, a 1st RAM stored with the count value of the 1st counter, a 2nd RAM wherein the TAG address and count value before the contents of the TAG address array is updated are registered each time the contents are updated, and a 2nd counter which generates an address to be registered in the 2nd RAM.
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