发明名称 SYNCHRONOUS RECTIFIER WITH GATE CLAMPING TERMINAL
摘要 PROBLEM TO BE SOLVED: To provide a synchronous rectifier which reduces the noise of a voltage converter and can meet demands for size and cost reductions. SOLUTION: A synchronous rectifier is constituted in such a way that a FET 4a for rectification and an FET 5a for flywheel are provided on the secondary side of a transformer and an FET 4b for clamping gate, the source, drain, and gate of which are respectively connected to the gate of the FET 4a, one end of the secondary-side winding of the transformer, and the junction between a coil 6 and one end of a capacitor 7, and another FET 5b for clamping gate, the source, drain, and gate of which are respectively connected to the gate of the FET 5a, the other end of the secondary-side winding, and the junction between the coil 6 and one end of the capacitor 7, are provided. The FETs 4a and 4b are housed in one parts and the FETs 5a and 5b are housed in another parts.
申请公布号 JP2000217349(A) 申请公布日期 2000.08.04
申请号 JP19990013749 申请日期 1999.01.22
申请人 NEC CORP 发明人 SHINADA YOSUKE
分类号 H02M3/28;(IPC1-7):H02M3/28 主分类号 H02M3/28
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