| 摘要 |
PROBLEM TO BE SOLVED: To match times of respective digital and analog data by generating edited digital data through mixing of digital data prior to editing stored in a buffer circuit by the control of a frame editing circuit, comparing the digital data before and after editing and calculating delay time in editing. SOLUTION: In a write address detection circuit 32, when stipulated address data 36 which are the output signals of a fixed pattern generation circuit 33 and write address signals 15 which are the output signals of a write address control circuit 12 match, the write address detection circuit 32 generates stipulated write address detection signals 37 for indicating that a write address is a stipulated address value and outputs them to a first buffer circuit 34. When the stipulated write address detection signals 37 are inputted, the first buffer circuit 34 stores parallel data signals 2 as the digital data 38 prior to editing.
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