Modular electronic circuit having improved synchronization for use in processing and transmission of electronic data at very high frequencies has modules comprising cells with means for coordinating clock signals

摘要

System has synchronizing cells (7,8) clocked by a primary clock signal (H0) and outputting secondary clock signals (H1,H2) as requested by validation signals (V1,V2), which respectively activate first and second modules. The cells have means (10) for locking each signal (V1) associated with means (11,12) for equalizing the secondary clock signal (H1) time period and for coordinating signals (H1,H2).