发明名称 |
EVALUATION SYSTEM FOR COMPUTER MEMORY READ PERFORMANCE |
摘要 |
PROBLEM TO BE SOLVED: To compare main memory read-in performance by increasing or decreasing the busy rates of the buses and switches of a computer by sequentially writing data to a main memory device and measuring the needed time. SOLUTION: A data read-in execution and elapsed time measuring means 183 and a bus or switch busy rate varying means 184 of each measurement process 181 are read in data of a certain number of bytes from the main memory device 130 or cache memory devices 112 and 113 successively M times. The means 184 varies a main memory read-in frequency M in every unit time. Each process 181 calculates the time T needed to read in the data M times. A measurement data editing and graphing means 186 calculates the memory read-in time and the busy rate of the buses or switches from the mean value of measurement results T. Thus, the busy rate of the buses or switches between a processor 111 and main memory device 130 is varied to measure the memory read-in time. |
申请公布号 |
JP2000215105(A) |
申请公布日期 |
2000.08.04 |
申请号 |
JP19990016635 |
申请日期 |
1999.01.26 |
申请人 |
HITACHI LTD |
发明人 |
SHOJI TADASHI;ARAI TOSHIAKI |
分类号 |
G06F12/08;G06F11/22;G06F11/34 |
主分类号 |
G06F12/08 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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