发明名称 DATA PROCESSOR, ELECTRONIC COMMUNICATION DEVICE, INFORMATION PROCESSING METHOD, AND METHOD FOR USING SPEEDUP OF HARDWARE
摘要 PROBLEM TO BE SOLVED: To obtain a device and method which enables processors of a data processing system to perform multiple operations in a single cycle. SOLUTION: The data processor is equipped with a random access memory 104, processors 12 and 16, and an interface 102 which is capable of performing multiple operations in a single cycle by connecting the random access memory 104 to the processors 12 and 168. The interface 102 is composed of a hardware accelerator.
申请公布号 JP2000215057(A) 申请公布日期 2000.08.04
申请号 JP19990321525 申请日期 1999.10.06
申请人 TEXAS INSTR INC <TI> 发明人 LAURENTI GILBERT;DJAFARIAN KARIM;GIACALONE JEAN-PIERRE;LAINE ARMELLE
分类号 G06F9/38;(IPC1-7):G06F9/38 主分类号 G06F9/38
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