发明名称 MEMORY CONTROLLER
摘要 PROBLEM TO BE SOLVED: To reduce peak currents necessary for a refresh operation, and to quickly start at the time of power supply or the like, and to simplify a circuit. SOLUTION: This is a memory controller 3 for controlling the refresh operation of a memory device constituted by dividing a plurality of memory elements into a plurality of memory blocks Ma, Mb, Mc.... This memory controller is provided with plural refresh control parts 11 for operating the refresh operation for each memory block, a refresh counter 12 whose initial value can be set when this is reset for starting the refresh operation for each refresh control part 11 when the count value reaches a prescribed value, and an initial value setting part 13 for setting different initial values for each refresh counter 12.
申请公布号 JP2000215661(A) 申请公布日期 2000.08.04
申请号 JP19990008753 申请日期 1999.01.18
申请人 FUJITSU LTD;FUJITSU PERIPHERALS LTD 发明人 SANO KYOZO;KINOSHITA TOMOMORI
分类号 G11C11/406;(IPC1-7):G11C11/406 主分类号 G11C11/406
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