发明名称 APPARATUS AND METHOD FOR PHASE SYNCHRONIZATION
摘要 PROBLEM TO BE SOLVED: To provide a phase synchronizing device, with which an extracted phase by a data re-timing circuit is automatically optimized when extracting a clock signal from a data input signal and to provide a phase synchronizing method. SOLUTION: This phase synchronizing device is provided with a phase-locked loop circuit 10, that outputs a VCO oscillation signal as a clock signal phase- locked to a data input signal DATA IN, a phase shift circuit 14 that outputs a clock signal with respect to the data input signal DATA IN, a data re-timing circuit 12 that has an identification recovery function outputting a re-timed identification recovery signal as re-timing data, and a phase shift control circuit 16 that uses a data latching circuit 162 to receive an extracted clock signal generated and outputted from the phase locked loop circuit 10 via the phase shift circuit 14 and latches a signal level (logic level), by using the data input signal DATA IN so as to generate phase information.
申请公布号 JP2000216763(A) 申请公布日期 2000.08.04
申请号 JP19990011781 申请日期 1999.01.20
申请人 NEC CORP 发明人 HONMA KANENORI
分类号 H04L7/033 主分类号 H04L7/033
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