发明名称 PLANATION METHOD OF INSULATION FILM BETWEEN LAYERS
摘要 PURPOSE: A method for planarizing an interlayer insulation film is provided to assure an accurate polishing stop position in a chemical mechanical polishing process when planarizing the interlayer insulation film, and to prevent the lowering of the electrical characteristics and the lifetime of the device due to an SOG thin film on an upper part of a metal interconnection pattern. CONSTITUTION: After depositing a metallic film of 6300 angstrom by an electron beam deposition method or a sputtering method on a bottom thin film(11), a metal interconnection pattern(12) is formed by a lithography process. And, an oxide(13) containing silicon is deposited on the bottom thin film. Then, a glass melted by an organic solvent by an SOG(Spin On Glass) is spin-coated on the bottom thin film, and is annealed to fill an SOG thin film(14) in a metal contact hole and is planarized locally. Then, the first PETEOS thin film(15) is deposited through an electrical discharge by a PECVD(Plasma Enhanced Chemical Vapor Deposition) process. Then, a local planarization is achieved by filling a gap between the metal interconnection pattern by polishing the PETEOS thin film and the SOG thin film through a mechanical chemical polishing(CMP) process. And, the second PETEOS thin film(16) is deposited to insulate between metal interconnections through an electrical discharge by a PECVD process on an upper part of the bottom thin film, and thus an interlayer insulation film is completed.
申请公布号 KR100260512(B1) 申请公布日期 2000.08.01
申请号 KR19980007053 申请日期 1998.03.04
申请人 ANAM SEMICONDUCTOR.,LTD. 发明人 KIM, SANG YONG
分类号 H01L21/304;(IPC1-7):H01L21/304 主分类号 H01L21/304
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