发明名称 Method of fabricating a split gate structure of a flash memory
摘要 On a substrate, there is at least a first split gate and a second split gate. A dielectric layer is then formed on the substrate to cover the first split gate and the second split gate. The dielectric layer is patterned so that the dielectric layer covers at least a portion of the first split gate, a portion of the second split gate and a common source region between the first split gate and the second split gate. A polysilicon layer is formed on the dielectric layer. The polysilicon layer is then patterned.
申请公布号 US6096603(A) 申请公布日期 2000.08.01
申请号 US19980099975 申请日期 1998.06.19
申请人 WORLDWIDE SEMICONDUCTOR MANUFACTURING CORP. 发明人 CHANG, KO-HSING;JUO, KUO-HAO
分类号 H01L21/8247;(IPC1-7):H01L21/824 主分类号 H01L21/8247
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