| 摘要 |
A power-up circuit for a semiconductor memory device includes an external supply voltage level detector for detecting an external supply voltage level received from an exterior, and generating an external supply voltage detection signal when a predetermined voltage level is detected, an internal supply voltage level detector for detecting an internal supply voltage level and generating an internal supply voltage detection signal when a predetermined voltage level is detected, and a power-up signal generator for receiving the internal and external supply voltage detection signals and generating a low level power-up signal at a falling edge of the internal supply voltage detection signal. The circuit prevents an access of the external device, thereby preventing the generation of an excessive current such as a latch-up caused by an instability at the internal nodes and the unstable operation of the internal circuit.
|
