| 摘要 |
In order to suppress parasitic capacitances between the signal electrodes in a planar filter with many signal pins, which are led through a carrier (I) and which each have a capacitor, with a signal layer (3) connected to the signal pin, a ground layer (4) connected to ground and a dielectric layer separating the two said layers, said planar filter is of a monolithic construction. The electrodes of the capacitors are applied to the carrier (1), which forms the dielectric, is shaped as a block from a mass of a higher dielectric constant and, after shaping and perforation, is sintered and ground, the ground electrode (4) covering the entire surface area of one of the side surfaces of the carrier (1), apart from the pin leadthroughs (2) of the signal pins and their surrounding area, and the signal electrodes (3) on the other side surface of the carrier (1) forming insular regions extending from the pin lead-throughs (2) of the signal pins to the edge of the carrier (1). This planar filter, advantageously provided with a supporting plate, is used for example in plug-in connectors soldered onto printed circuit boards.
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