发明名称 D-TYPE FLIP-FLOP
摘要 <p>PROBLEM TO BE SOLVED: To add functions required for forming a semiconductor integrated circuit, especially a reset function and a set function or a preferable function of coping with scan test, to the D-type flip-flop of differential-RS latch constitution. SOLUTION: As a NAND circuit for connecting input to a set input terminal connected to an output terminal D' for outputting the same value as the data input terminal D of a differential inverter 1, a 3-input NAND circuit NAND3 is used. A reset signal input terminal RSTN is connected to one of the input of the 3-input NAND circuit NAND3. A Pch transistor TP101 inserted between the set input terminal S and a high potential side power source and an Nch transistor TN101 inserted between a reset input terminal R and a low potential side power source are controlled by a set signal input terminal SETN.</p>
申请公布号 JP2000209074(A) 申请公布日期 2000.07.28
申请号 JP19990011719 申请日期 1999.01.20
申请人 MATSUSHITA ELECTRIC IND CO LTD 发明人 SUZUKI RYOICHI
分类号 H03K3/3562;H03K3/037;(IPC1-7):H03K3/037;H03K3/356 主分类号 H03K3/3562
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