Multiple access type storage device has second k bit shift register with serial input and parallel output with latter connected to input of flip-flop circuit

摘要

A first k bit shift register (150) has a parallel input and a series output. The parallel input is connected to an input of a first flip-flop circuit (155). A second k bit flip-flop circuit (159) has a parallel input and a parallel output. The latter is connected to a data bus (161). A second k bit shift register (154) has a serial input and a parallel output. The latter is connected to the input of the flip-flop circuit (159). An Independent claim is included for: (a) a coprocessor