发明名称 INTEGRATED CIRCUIT
摘要 PROBLEM TO BE SOLVED: To easily cope with a standard process or low-temperature process and flattening technology for improved mounting density of capacitance by depositing a dielectrics layer in a cavity, with a conductive layer deposited over it functioning as an upper part plate. SOLUTION: A conductive plug 301 is formed of tungsten or other metal material, comprising a cavity 308 in it. The conductive plug 301 is conductive to a first metal layer 304 which is connected to a conductive bias 305. The conductive bias 305 eventually contacts to a source or drain of an FET. A capacitor comprises a side wall surface 309 of a cavity, a lower part surface 310 of it, and an upper part surface 300 of a plug. A high permittivity material layer 302 of the capacitor comprises an upper part plate 303.
申请公布号 JP2000208741(A) 申请公布日期 2000.07.28
申请号 JP20000002770 申请日期 2000.01.11
申请人 LUCENT TECHNOL INC 发明人 ALERS GLENN B
分类号 H01L27/108;H01L21/02;H01L21/768;H01L21/8242 主分类号 H01L27/108
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